Mitigating NBTI-Induced Circuit Aging by Collaboration between Input Vector Control and Gate Replacement
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Graphical Abstract
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Abstract
Since the existing selection method to achieve minimum delay using input vector control(IVC) cannot effectively take the advantage of gate replacement(GR), a method of selecting optimal input control vector is proposed in this paper for collaboration between IVC and GR to mitigate circuit aging induced by negative bias temperature instability(NBTI). In this scheme, firstly the optimal input control vector is selected from the candidate vector set to control circuit inputs, in order to maximize the number of the critical gate input pins that can be set to logic 1 by IVC. Then the remaining input pins that cannot be set to logic 1 by the optimal input control vector are analyzed for their GR protectability, and GR is used to replace the driving gates of pins if the pins are GR protectable. The experimental results show that, in comparison with the existing scheme, the proposed scheme increases the circuit delay degradation improvement rate by 7.56% on average, showing a relative increase of 32.64%. At the same time, both the overhead for additional area and intrinsic delay are slightly reduced.
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