Technology Mapping for FPGA with Multi-mode Logic Cell

Zhang Kun; Zhou Huabing; Chen Lingdou; Liu Zhongli

Zhang Kun, Zhou Huabing, Chen Lingdou, Liu Zhongli. Technology Mapping for FPGA with Multi-mode Logic CellJ. Journal of Computer-Aided Design & Computer Graphics, 2009, 21(10): 1375-1380.

Citation:

Zhang Kun, Zhou Huabing, Chen Lingdou, Liu Zhongli. Technology Mapping for FPGA with Multi-mode Logic CellJ. Journal of Computer-Aided Design & Computer Graphics, 2009, 21(10): 1375-1380.

Citation:

Zhang Kun, Zhou Huabing, Chen Lingdou, Liu Zhongli. Technology Mapping for FPGA with Multi-mode Logic CellJ. Journal of Computer-Aided Design & Computer Graphics, 2009, 21(10): 1375-1380.

Technology Mapping for FPGA with Multi-mode Logic Cell

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A multi-mode FPGA logic cell and a technology mapping tool VMAP are presented.VMAP is composed of technology mapping for 4-input look-up tables(LUTs) and merging for multi-mode logic cells.The algorithm of merging is based on maximum cardinality matching and can merge some LUTs.Experimental results on MCNC benchmark circuits show that the number of LCs can be reduced by 15.7% on average after merging some LUTs into multi-mode LCs.

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Technology Mapping for FPGA with Multi-mode Logic Cell

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