AN ALGORITHM FOR VORONOI DIAGRAM ON INTEGRATED CIRCUIT SUBSTRATE COUPLING SIMULATION

An algorithm for Voronoi diagram on Integrated Circuit Substrate Coupling Simulation is introduced．The algorithm computes a geometric transformation of Voronoi diagram with sweepline technique．From down to top，by dealing with each site，the transferred Voronoi diagram is constructed．Since the algorithm is linked to Circuit layout，it can compute Voronoi diagram near wells which is suitable for IC physical feature．It can also be used in the case where there are four or more cocircular and ／or not unique bottommost sites．