Pipeline ADC Background Calibration Applying Polynomial Interpolation

To alleviate power consumption of sample and hold operational amplifier and inter-stage residual amplifiers in traditional pipeline analog to digital converter (ADC), the residual amplifiers can work at open-loop mode instead of closed-loop mode.For the nonlinear errors introduced by open-loop amplifier, a novel background calibration method is presented in this paper.First, transfer function model of the open-loop amplifier is established, statistical characteristic of signal transportation is applied to achieve polynomial interpolation, nonlinear error is estimated and compensated to achieve the calibration.To verify the effect of the calibration, simulation is done in a 12 bits, 40 Msample rate pipeline ADC.The experimental results show that, with 117.2kHz input signal, by applying calibration, differential nonlinearity of the ADC improves from (-0.5, -0.5) to (-0.25, -0.25), integral nonlinearity improves from (-0.18, -0.5) to (-0.5, -0.25), spurious free dynamic range and signal to noise and distortion ratio improve from 48.5dB and 42.6dB to 78.9dB and 72.3dB, the effective number of bits of the ADC reaches 11.7 bits.