Low Power Branch Target Buffer Design Based on Hopping Access
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Graphical Abstract
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Abstract
The traditional branch target buffer(BTB)has to be always accessed during instruction fetch stage.Since the branch instructions account for about 20% of the total executed instructions,at least 80% of the BTB accesses are redundant.Considering the characteristic of the fixed distance of branch instructions,we proposed a hopping access(HA)algorithm,by which we reduced the accesses to the BTB to achieve a significant dynamic energy reduction while maintaining the performance.By performing HA algorithm the branch distances between two consecutive branch instructions are dynamically computed and updated into the according BTB entries during program execution.When BTB hits,the BTB accesses are skipped until next branch according to the relevant branch distance.The algorithm is only applied to the predicted taken branches to reduce the overall hardware overhead.Experimental results on the hardware model shows that HA algorithm achieves a 72% dynamic energy reduction over a 128-entry BTB at the cost of a negligible 0.013% performance loss.
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