An Overview of Integrating High Level Synthesis and Floorplan

The research on "integrating high level synthesis and floorplan" is a very important part in the research on electronic design automation.In this paper,the current research status of this field is introduced,and the basic methodologies and algorithms are also presented.These methodologies and algorithms are mainly focused on the following two problems,which are caused by the rapid development of IC fabrication technology.Firstly,with the fast increasing of the complexity of IC chips,it is necessary to start a design at a higher abstraction level.Secondly,as the feature size of IC keeps on shrinking into the nanometer level,physical effects have been playing a dominant role in final delay and power consumption of a circuit. In this paper,the typical algorithms of the 90s of last century are described,and the basic principles of these algorithms are also analyzed and summarized.