Reconfigurable FFT/DCT Coprocessor and Its VLSI Design

Fast Fourier transform/discrete cosine transform(FFT/DCT) of different lengths need to be implemented with various butterfly structures,it is therefore challenging to achieve the tradeoff between the performance and area.A new FFT/DCT structure is proposed to remedy this problem.When N is equal to 8ⁿ for N-point FFT,the area-efficient radix-2/2²/2³ structure is used.Otherwise the radix-2/2²/2³ structure is configured as a radix-8 structure,combined with performance-efficient radix-2/4 structure.Using zero-detecting and the precision adaptive mechanisms,one reconfigurable FFT/DCT coprocessor is implemented based on this structure.The coprocessor can run at 200 MHz with 148K logic gates in UMC 0.13 μm process.Experimental results show that the coprocessor can improve the FFT/DCT performance without area sacrifice.