Implementation of Co-Verification Environment for Embedded System
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Abstract
Design and implementation of a hardware/software co-verification environment is introduced to verify the correctness of both the hardware and software components of embedded systems as well as the interaction between them.The ESDL language and the EHDL language are defined for hardware and software separately.The co-verification environment consists of an embedded software debugger and an embedded hardware simulator.It adopts instruction-set architecture co-simulation model.With the environment,both hardware errors and software errors can be detected and deleted before fabrication.
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