Double-Step Incremental Generation of Ellipse and Its Hardware Implementation

The discriminators of algorithm obey a simple recurrence formula which may be evaluated by only integer arithmetic and binary shifts.The prove of algorithm is less complex and easier understood than existing one.The CPLD/FPGA prototype implementation is done by using HDL.The performance of hardware implementation is better than software program.The algorithm can be applied to vector to raster converter for output devices such as plotter.