RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATION

Zhang Yan; Ye Yizheng

Zhang Yan, Ye Yizheng. RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATIONJ. Journal of Computer-Aided Design & Computer Graphics, 1997, 9(5): 408-413.

Citation:

Zhang Yan, Ye Yizheng. RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATIONJ. Journal of Computer-Aided Design & Computer Graphics, 1997, 9(5): 408-413.

Citation:

Zhang Yan, Ye Yizheng. RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATIONJ. Journal of Computer-Aided Design & Computer Graphics, 1997, 9(5): 408-413.

RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATION

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This paper reviews the theory,method and application on retiming in synchronous logic circuit,which has been developed since 1980s.Prospect is also given for retiming applications.

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RETIMING IN SYNCHRONOUS LOGIC CIRCUIT OPTIMIZATION

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