A Clustering-Based Algorithm for Zero-Skew Clock Routing with Buffer Insertion

Clock routing plays an important role in layout design for synchronous circuit. A zero-skew clock routing algorithm with fast clustering and performance improvement is proposed. During clock routing tree construction, we introduce a new cell matching strategy to merge two sub-trees. Proper buffers are selected and inserted into the clock routing tree, reducing path delay and achieving zero-skew. Clustering method has accelerated the speed of algorithm significantly.