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Ouyang Yiming, He Min, Liang Huaguo, Wang Xiumin, Chang Hao. A Fault-Tolerant Architecture Design of Fault-Aware RVOQ in Three-Dimensional Network-on-Chip[J]. Journal of Computer-Aided Design & Computer Graphics, 2015, 27(1): 192-200.
Citation: Ouyang Yiming, He Min, Liang Huaguo, Wang Xiumin, Chang Hao. A Fault-Tolerant Architecture Design of Fault-Aware RVOQ in Three-Dimensional Network-on-Chip[J]. Journal of Computer-Aided Design & Computer Graphics, 2015, 27(1): 192-200.

A Fault-Tolerant Architecture Design of Fault-Aware RVOQ in Three-Dimensional Network-on-Chip

  • Aiming at the reliability and congestion problems caused by the faults occurring in input buffer and crossbar of the router, this article proposes a fault-tolerant and fault-aware RVOQ router design to tolerate fault. Firstly, this article adds a redundant virtual channel in each input port to tolerate input buffer faults, through the feedback of fault information and arbitration algorithm, our fault-tolerant architecture design can ensure data select valid path to transmit. Secondly, this article modifies the crossbar architecture, by adding a multi-channel selection switch and corresponding control modules, input data gives priority to the local data channel, when faults occur, the data select redundant path to transmit. The experimental results show that, compared to the reference documentation, our proposed scheme has 11%-53.1% less average network latency in the presence of 3 faults under uniform traffic pattern. Our scheme has obvious advantage and ensures the high-reliability and low-latency of the entire network when congestion and faults occur.
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