Double-TSV Online Tolerance Scheme
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Graphical Abstract
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Abstract
The technology of 3D ICs is an efficient method for the continuation of Moore’s law, however, the yield of through-silicon-vias(TSVs) in 3D ICs isn’t satisfactory. To address the problem, a double-TSV online fault-tolerant scheme is proposed. A coupling channels structure is used to reduce the failure probability of TSVs. A leakage current shut down structure is designed to shield the leakage fault automatically by monitoring the leakage current of faulty TSVs in real time. When one TSV occurs resistive open fault, a temporary discharge structure functions to repair the output signal spontaneously. Experimental results show that the proposed scheme can perform online tolerance for the leakage fault and resistive open fault without any consumption of test time and pins of the circuits, and efficiently improve the reliability and yield of 3D ICs while the normal operation of the circuit is not affected.
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