Defect-Unaware Defect-Tolerant CMOL Cell Mapping
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Graphical Abstract
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Abstract
Targeting at the problem of high defect rate in CMOS/nanowire/MOLecular hybrid(CMOL) circuits,a defect-free area extraction based defect-unaware mapping method is proposed.First,cooperative detection of minimum logical units with nanodevices are utilized to accelerate the extraction.Then evolutionary algorithm is introduced to implement logic mapping in defect-free area.By designing selection strategy,fitness function and elitism strategy to model bio-evolution process,the solution is improved by global searching.Experimental results demonstrate the improvement of the proposed method in CPU time and wire length.
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