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Yu Jiande, Xie Ding, Shao Yun, Wang Jian, Chen Liguang, Lai Jinmei, Tong Jiarong. Min-Loop-Maximization Method on FPGA Routing Resources Architecture Design[J]. Journal of Computer-Aided Design & Computer Graphics, 2010, 22(6): 934-942.
Citation: Yu Jiande, Xie Ding, Shao Yun, Wang Jian, Chen Liguang, Lai Jinmei, Tong Jiarong. Min-Loop-Maximization Method on FPGA Routing Resources Architecture Design[J]. Journal of Computer-Aided Design & Computer Graphics, 2010, 22(6): 934-942.

Min-Loop-Maximization Method on FPGA Routing Resources Architecture Design

  • A method that maximizes the minimum loop size in the routing-resource graph is proposed in FPGA routing resources architecture design to improve the flexibility of the routing resources.First analyze the relationship between the minimum loop size in the routing-resource graph and the transition flexibility of signals in the routing resources.Then maximize the minimum loop by adjusting the wires connections in the routing resources.Design a novel switch box,called minimum-loop maximization(MLM)switch box with this method.Experimental results show that while compared with 4 typical academic switch boxes,Disjoint,Universal,Wilton and JSB,MLM is at average level in timing and outperform all of them in routability by 17.7%,8.0%,2.4% and 2.2% separately.
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