Simulation Method for IC Fault Injection Attacks

Due to the low requirement of equipment and great effectiveness of attack,fault injection attack（FIA） is becoming an effective means for chip attack,and poses serious threats to the information security of integrated circuits.For early identification of security hazards,circuit designers need a simple and effective method to evaluate the countermeasures of the designs against the FIAs.To address the need,this paper proposed a simulation-based method,which mimics the FIAs on a circuit design.After the circuit under test（CUT） is submitted,the process of mimicking and evaluating is automatically executed and a report on the ability of the CUT against the FIAs is generated.The method set three basic parameters to generate a file named control file containing fault data,in order to build complex fault models and mimic various FIA techniques.After the CUT is synthesized into a netlist,fault injection logic（FIL） implemented using synthesizable hardware describe language is inserted into the netlist.The new netlist is then passed to the simulator,and the FIL automatically reads the control file,injects faults into the CUT and collects the CUT’s outputs during simulation.Finally,the evaluation program carries out the evaluation with the collected outputs and gives an evaluation report.The experimental results with various fault injection attacks and differential fault analysis on AES-128 encryption circuit showed the simplicity and ef-fectiveness of the proposed method and reported that AES-128 circuit is sensitive to the flip fault,and certain bytes of the output ports are more prone to attacks and thus need to be protected.