A Trace Compression Approach for Predicative Execution Processor

Collecting the program execution traces in real time is essential to both the post-silicon verification and software debugging.Limited by on-chip storage resource and communication bandwidth supplied by processor, a trace compression approach is proposed for predicative execution processor in order to improving compression ratio.The predicative bits and program counters are compressed through two stages respectively by considering the redundant features of them so that the locality of PC and the integrity of whole trace are held.With SuperV DSP as the research prototype, in comparison with traditional approach, the average compression radio is increased by 21.95%.The real-time debugging requirements could be well met by adopting this approach.