A Dynamic Adjustment Design for Hybrid Fault-tolerant Code in Memory System

An address mapping design which supports the adjustment of hybrid ECC codes is proposed to achieve tradeoff between reliability and cost.We have observed that a proportional relationship exists between the length of data and the length of the check information for ECC codes,so we propose an address mapping logic.Since the data and the check information are separately stored,once the memory is accessed or the fault tolerance level is changed,the address mapping logic is able to guarantee the accesses to the check information,and to facilitate the adjustment of the fault tolerance level.The experimental results indicated that this method is effective with negligible performance and power cost.