Design of RISC-V CPU for 100 Gbps Network Application

As a new open-source reduced instruction set architecture,RISC-V has advantages of low power consumption,small area and high performance.Therefore,technology and products based on RISC-V are de-veloping rapidly.However,currently there are few medium and high end 64 bit CPU design instances based on the RISC-V architecture,and it is also hard to find corresponding commercial IP,especially for high-speed network applications.In this paper,we firstly improved the open source 64 bit U500 RISC-V SoC by extending the Bus width and adding L2Cache,and etc.Secondly we implemented a complete 100 Gbps Ethernet func-tion,which includes MAC,PCS,and SerDes,and the TX buffer and RX buffer used for the function.Finally we proved correctness and effectiveness of entire 64 bit RISC-V CPU design and 100 Gbps Ethernet function by simulation,FPGA verification and boot of Linux operation system.The designed RISC-V CPU and 100 Gbps Ethernet function can be applied to data center application such as smart network interface cards.