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He Hanna, Fang Fang, Wang Wei, Chen Tian, Guo Jinliang, Ren Fuji. Low Power Mapping Based on Improved Simulated Annealing Genetic Algorithm for 3D NoC[J]. Journal of Computer-Aided Design & Computer Graphics, 2019, 31(4): 681-688. DOI: 10.3724/SP.J.1089.2019.17157
Citation: He Hanna, Fang Fang, Wang Wei, Chen Tian, Guo Jinliang, Ren Fuji. Low Power Mapping Based on Improved Simulated Annealing Genetic Algorithm for 3D NoC[J]. Journal of Computer-Aided Design & Computer Graphics, 2019, 31(4): 681-688. DOI: 10.3724/SP.J.1089.2019.17157

Low Power Mapping Based on Improved Simulated Annealing Genetic Algorithm for 3D NoC

  • Power optimization is an important part in NoC design. In order to solve the problem of mapping IP cores to NoC reasonably, an improved simulated annealing genetic algorithm(ISAGA) based on initial population optimization is proposed in this paper. Firstly, the initial population selection method is improved to obtain a lower power consumption mapping scheme. Then for the local optimization problem of the genetic algorithm, the simulated annealing algorithm is combined with the genetic algorithm cross-operation stage to obtain the global optimal scheme. The experiment is implemented in C++ language under Windows system,the experimental results show that compared with the traditional genetic algorithm, the algorithm has better convergence and can quickly search for better solutions, in the case of 124 IP cores, the proposed method can reduce 32.0% compared with the genetic algorithm.
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