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王琪, 鲍丽丹, 张铁军, 王东辉, 侯朝焕. 软硬件协同循环优化方法的设计与实现[J]. 计算机辅助设计与图形学学报, 2013, 25(10): 1574-1581.
引用本文: 王琪, 鲍丽丹, 张铁军, 王东辉, 侯朝焕. 软硬件协同循环优化方法的设计与实现[J]. 计算机辅助设计与图形学学报, 2013, 25(10): 1574-1581.
Wang Qi, Bao Lidan, Zhang Tiejun, Wang Donghui, Hou Chaohuan. The Design and Implementation for a Software-Hardware Cooperative Loop Optimization Mechanism[J]. Journal of Computer-Aided Design & Computer Graphics, 2013, 25(10): 1574-1581.
Citation: Wang Qi, Bao Lidan, Zhang Tiejun, Wang Donghui, Hou Chaohuan. The Design and Implementation for a Software-Hardware Cooperative Loop Optimization Mechanism[J]. Journal of Computer-Aided Design & Computer Graphics, 2013, 25(10): 1574-1581.

软硬件协同循环优化方法的设计与实现

The Design and Implementation for a Software-Hardware Cooperative Loop Optimization Mechanism

  • 摘要: 为了提升处理器执行循环的性能,降低循环开销,提出一种适用于多发射数字信号处理器(DSP)的软硬件协同循环优化方法.在对循环体量化分析的基础上,利用编译器进行循环标志指令的插入和循环开销指令的删除,并由新增的硬件专用循环单元根据循环标志指令携带的信息实现循环计数器的增减和取指地址的计算等功能,达到零开销循环的目的.在多发射DSP SuperV_EF01上的实验结果表明,应用文中方法后,指令周期数和汇编代码大小平均降低了20.94%和4.06%.

     

    Abstract: In order to increase loop performance and reduce loop overhead, a software-hardware cooperative loop optimization mechanism suitable for multi-issue digital signal processor (DSP) is proposed in this paper.In this mechanism, based on the quantitative analysis of the loop body, the compiler inserts marking instruction in front of the effective loop body and deletes loop overhead instructions.A loop-overhead-reducing hardware unit is added to manage the loop counter and calculate the address of the instruction to be fetched according to the parameters from loop marking instruction.By employing this mechanism, loop overhead is avoided.The experimental results on the multi-issue DSP SuperV_EF01 show that, this mechanism can decrease the instruction cycles and assembly code size by 20.94%and 4.06%separately.

     

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