嵌入式P端口SRAM的端口间故障测试
Testing Inter-port Faults in Embedded Multi-Port SRAM
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摘要: 为了有效地测试嵌入式P端口静态随机存取存储器(SRAM)端口间的故障,提高电子系统的安全性,提出一种基于结构故障模型的故障测试算法.首先对March C-算法扩展得到w-r算法,即让一个端口执行March C-算法的同时另一个端口于偏移量为±2的地址并行执行伪读操作,并考虑存储器的规则结构给出了其简化算法;然后提出w-w算法,通过2个端口向存储器单元并行写(不同的地址),可有效地激发2个写端口之间的各种故障,使之适用于不同物理布局的存储器,在保证时间复杂度合理的前提下提高了端口间的故障覆盖率.将故障注入64×8位的双端口SRAM中进行仿真实验,得出了故障检测表,验证了其时间复杂度低,表明文中算法具有100%的端口间故障覆盖率.Abstract: In order to detect inter-port faults in multi-port SRAM,this paper proposes a novel algorithm which is called w-r Algorithm and w-w Algorithm based on structural fault model.First,w-r Algorithm is improved from March C-Algorithm,its test addrest to the concurrent port should be addr±2 is demonstrated.Then,w-w Algorithm is proposed to detect the faults stimulated by concurrent writing(to different addrest).In a word,it not only can detect traditional faults of single port but also can detect all inter-port faults,and it can deal with various SRAM of different line arrangement in the layout.Finally,Based on the experimental results on 64×8 bit double port SRAM,we conclude that it has 100% fault coverage with low time complexity.