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刘耿耿, 江列湫, 李泽鹏, 吴若昕, 徐宁. 先进制程下基于多策略融合的时延优化层分配算法[J]. 计算机辅助设计与图形学学报.
引用本文: 刘耿耿, 江列湫, 李泽鹏, 吴若昕, 徐宁. 先进制程下基于多策略融合的时延优化层分配算法[J]. 计算机辅助设计与图形学学报.
GengGeng LIU, LieQiu JIANG, ZePeng LI, RuoXin WU, Ning XU. Delay-Driven Layer Assignment Algorithm Based onIntegrating Multi-Strategyfor Advanced Technology Nodes[J]. Journal of Computer-Aided Design & Computer Graphics.
Citation: GengGeng LIU, LieQiu JIANG, ZePeng LI, RuoXin WU, Ning XU. Delay-Driven Layer Assignment Algorithm Based onIntegrating Multi-Strategyfor Advanced Technology Nodes[J]. Journal of Computer-Aided Design & Computer Graphics.

先进制程下基于多策略融合的时延优化层分配算法

Delay-Driven Layer Assignment Algorithm Based onIntegrating Multi-Strategyfor Advanced Technology Nodes

  • 摘要: 通过引入层分配算法, 能够有效优化物理设计过程中的时延和通孔数等指标, 提高电路性能. 为此, 提出一种同时考虑非默认规则线和耦合效应的基于多策略融合的时延优化层分配算法. 首先, 针对现有工作对线网差异性考虑不细致的问题, 提出线网异化策略; 其次, 针对现有工作对网格边拥塞情况评估不够合理的问题, 提出段分级策略; 然后, 针对现有工作对非法线网进行拆线重绕时更注重考虑拥塞约束而导致时延过高的问题, 提出重绕调整策略; 最后, 针对现有工作布线顺序不够合理的问题, 设计多种新颖的确定布线顺序的方法, 从而提出多目标驱动排序策略. 在2.60 GHZ CPU和64 GB内存的Linux环境下, 使用DAC12基准电路得到的实验结果表明, 所提算法能够在保证不发生溢出的情况下, 有效地优化时延和通孔数.

     

    Abstract: By introducing layer assignment algorithm, it can effectively optimize multiple important indicators such as delay and via counts in physical design, and then improve the chip performance. Therefore, a delay optimization layer assignment algorithm integrating multiple strategies is proposed, which considers both non-default-rule wire and coupling effect. First, aiming at the problem that the difference of nets is not carefully considered in the previous work, the differentiated net strategy is proposed. Second, in order to solve the problem of unreasonable evaluation of grid edge congestion in previous work, the segment classifying strategy is proposed. Third, aiming at the problem that the existing work pays more attention to consider congestion constraint when reassigning illegal nets, which leads to high delay of routing results, an effective reassignment and adjustment strategy is proposed. Finally, aiming at the problem of unreasonable routing order in the previous work, a variety of novel methods to determine the routing order are designed, and then a multi-objective driven sorting strategy is proposed. The algorithm runs in the Linux environment with a 2.60 GHz CPU and 64 GB of RAM. The validation experiments use the DAC12 circuit, and the experimental results show that the proposed algorithm can effectively optimize both delay and via counts without overflow.

     

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