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陈定亨, 夏银水, 储著飞. 缺陷无意识的CMOL单元容错映射[J]. 计算机辅助设计与图形学学报, 2017, 29(11): 2133-2139.
引用本文: 陈定亨, 夏银水, 储著飞. 缺陷无意识的CMOL单元容错映射[J]. 计算机辅助设计与图形学学报, 2017, 29(11): 2133-2139.
Chen Dingheng, Xia Yinshui, Chu Zhufei. Defect-Unaware Defect-Tolerant CMOL Cell Mapping[J]. Journal of Computer-Aided Design & Computer Graphics, 2017, 29(11): 2133-2139.
Citation: Chen Dingheng, Xia Yinshui, Chu Zhufei. Defect-Unaware Defect-Tolerant CMOL Cell Mapping[J]. Journal of Computer-Aided Design & Computer Graphics, 2017, 29(11): 2133-2139.

缺陷无意识的CMOL单元容错映射

Defect-Unaware Defect-Tolerant CMOL Cell Mapping

  • 摘要: 针对CMOS/纳米混合电路(CMOL)中器件高缺陷率的问题,提出一种基于无缺陷单元区域提取的缺陷无意识容错映射方法.首先采用最小逻辑单元和纳米二极管协同检测加速提取出CMOL阵列中无缺陷单元所在区域;然后采用进化算法进行无缺陷区域的CMOL单元映射,通过设计选择策略、适值函数以及精英策略模拟生物进化的过程对解进行全局搜索改进解的质量.实验结果表明,该方法在求解速度和线长上有较大的提升.

     

    Abstract: Targeting at the problem of high defect rate in CMOS/nanowire/MOLecular hybrid(CMOL) circuits,a defect-free area extraction based defect-unaware mapping method is proposed.First,cooperative detection of minimum logical units with nanodevices are utilized to accelerate the extraction.Then evolutionary algorithm is introduced to implement logic mapping in defect-free area.By designing selection strategy,fitness function and elitism strategy to model bio-evolution process,the solution is improved by global searching.Experimental results demonstrate the improvement of the proposed method in CPU time and wire length.

     

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