Abstract: With the IC technology scaling into nanometer regime, leakage power increases rapidly in VLSI, enhancing the area overhead of dynamic power management system.Reverse body bias technique (RBB) is a common method to reduce the leakage power at run-time.To overcome the larger area overhead of controller applied on RBB, this paper proposes a novel method, which can reduce area overhead of controller substantially.Based on dual-threshold voltage CMOS designs, when the input vector is the minimum leakage pattern, this paper only applies VRBB to the Dominate Leakage State and low threshold voltage MOS transistors, visibly reducing the area overhead of the controller through bringing down the number of the transistors applied RBB.Based on a set of ISCAS85 benchmark circuits in a Predictive 22 nm process, experimental results draw the following conclusion.In comparison with naive RBB, our algorithm can reduce 84.91% area overhead at the cost of 27.94% leakage current penalty.