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王晶, 蔡懿慈, 周强. 通过电源完整性分析和电迁移修复提高供电网络可靠性[J]. 计算机辅助设计与图形学学报, 2022, 34(4): 499-506. DOI: 10.3724/SP.J.1089.2022.19448
引用本文: 王晶, 蔡懿慈, 周强. 通过电源完整性分析和电迁移修复提高供电网络可靠性[J]. 计算机辅助设计与图形学学报, 2022, 34(4): 499-506. DOI: 10.3724/SP.J.1089.2022.19448
Wang Jing, Cai Yici, Zhou Qiang. Improving Power Grid Reliability with Power Integrity Analysis and Electromigration Fixing[J]. Journal of Computer-Aided Design & Computer Graphics, 2022, 34(4): 499-506. DOI: 10.3724/SP.J.1089.2022.19448
Citation: Wang Jing, Cai Yici, Zhou Qiang. Improving Power Grid Reliability with Power Integrity Analysis and Electromigration Fixing[J]. Journal of Computer-Aided Design & Computer Graphics, 2022, 34(4): 499-506. DOI: 10.3724/SP.J.1089.2022.19448

通过电源完整性分析和电迁移修复提高供电网络可靠性

Improving Power Grid Reliability with Power Integrity Analysis and Electromigration Fixing

  • 摘要: 电迁移是集成电路供电网络的关键失效因素,由于芯片集成度和电流密度的增加,供电网络设计留给电迁移优化的余量越来越小.供电网络的传统设计缺乏电迁移和电压降的综合分析,会造成设计的过度约束.为避免上述问题,提出一种基于通孔灵敏度分析的供电网络优化方法.首先,通过伴随矩阵的方法验证通孔的灵敏度对电迁移和电压降的影响;然后,结合供电网络的结构,针对关键通孔制定梯度优化策略,避免电迁移过度优化;最后,采用配置通孔阵列结构的方法提高通孔的可靠性.所提分析方法基于32核服务器实现,并通过IBM benchmark进行验证.实验结果表明,与全通孔优化的策略比较,所提方法以极小的面积代价实现电迁移优化,并且协同优化后,电路不存在电压降违规.

     

    Abstract: Electromigration is a severe reliability issue of the power grid network.Due to the increase in the integration and current density of the chip,the margin for electromigration optimization in power grid design is shrinking.However,the traditional design of the power grid network ignores the comprehensive analysis of electromigration and voltage drop,which will cause design over-constrained.In order to avoid the above problems,a power grid optimization method based on sensitivity analysis of via is presented.First,the adjoint matrix method is used to verify the impact of the sensitivity of the vias on electromigration and voltage drop.Then a gradient optimization strategy is formulated for the critical vias with the structure of the power grid network to avoid over-optimization of electromigration.Finally,the configuration of the via array structure is adopted to improve the reliability of the via array.The IBM benchmarks verify the proposed analysis method through numerical experiments on a server with 32 cores.The experimental results show that compared with the full-via optimization strategy,proposed method achieves electromigration optimization at a minimal area cost,and after co-optimization,the circuit has no IR drop violation.

     

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