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高云飞, 陈宇昊, 祝亚楠, 薛翔宇, 李洪革. 概率计算脉冲神经网络异步架构[J]. 计算机辅助设计与图形学学报, 2022, 34(4): 522-526. DOI: 10.3724/SP.J.1089.2022.19440
引用本文: 高云飞, 陈宇昊, 祝亚楠, 薛翔宇, 李洪革. 概率计算脉冲神经网络异步架构[J]. 计算机辅助设计与图形学学报, 2022, 34(4): 522-526. DOI: 10.3724/SP.J.1089.2022.19440
Gao Yunfei, Chen Yuhao, Zhu Yanan, Xue Xiangyu, Li Hongge. Asynchronous Architecture of Stochastic Computing Spiking Neuron Network[J]. Journal of Computer-Aided Design & Computer Graphics, 2022, 34(4): 522-526. DOI: 10.3724/SP.J.1089.2022.19440
Citation: Gao Yunfei, Chen Yuhao, Zhu Yanan, Xue Xiangyu, Li Hongge. Asynchronous Architecture of Stochastic Computing Spiking Neuron Network[J]. Journal of Computer-Aided Design & Computer Graphics, 2022, 34(4): 522-526. DOI: 10.3724/SP.J.1089.2022.19440

概率计算脉冲神经网络异步架构

Asynchronous Architecture of Stochastic Computing Spiking Neuron Network

  • 摘要: 概率计算是将二进制数编码为概率脉冲序列进行运算,具有功耗低、资源消耗少的优势,将概率计算应用于脉冲神经网络(spiking neuron network,SNN)的硬件电路设计,有利于实现类脑模式的运算.为了实现神经网络的低功耗边缘计算,本文提出一种基于概率计算的SNN异步架构.使用异步微流水线控制的交叉阵列实现LIF(leakyintegrate and fire)神经元模型,可用于实现全连接结构的SNN运算;在SNN的输入层使用概率逻辑将输入数值编码为概率脉冲串.通过累加完成神经元突触权值与输入脉冲的计算,并基于逻辑计算实现神经元膜电位数值的衰减;使用异步架构控制概率脉冲序列的编码与概率脉冲数据流的信息传输,降低了SNN运算的功耗.所提出的架构实现了784输入、10输出的SNN运算;在Xilinx KCU116平台进行验证,获得了78.4 GSOPS的峰值性能与137.47 GSOPS/W的能耗比.

     

    Abstract: Stochastic computing encodes binary numbers into stochastic pulse sequences in operating, which takes advantages of low power consumption and low resource usage. The application of stochastic computing in the design of spiking neural network(SNN) accelerator is beneficial to realize brain-like operation. In order to realize the low-power edge calculation of neural network, an asynchronous architecture using stochastic computing is designed, which can be used to realize the operation of full connected SNN. Cross array controlled by asynchronous micro-pipeline is implemented to achieve the leaky integrate and fire(LIF)neuron model. In the input layer of SNN, input values are encoded into stochastic pulses, and the synaptic weights and input pulses are calculated through accumulation, and the attenuation of neuron membrane potential value is realized based on logic calculation. The event-driven coding and the transmission of stochastic pulse are controlled by the asynchronous architecture, which can reduce the power consumption of SNN operation;The proposed architecture achieves an operation of SNN with 784 input and 10 output, which is verified on Xilinx KCU116 platform and achieves a peak throughput of 78.4 GSOPS and an energy efficiency of 137.47 GSOPS/W.

     

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