Abstract: Convolutional neural network accelerators based on embedded FPGAs have limited processing speed due to limited resources.A high performance convolutional neural network accelerator is proposed in this paper.Firstly,according to the characteristics of convolutional neural network algorithms and embedded FPGA platforms,the software and hardware co-operation architecture is designed.Then,under the constraints of storage resources and computing resources,a 2D DMA blocking strategy and a strategy for balancing the usages of DSP and LUT are proposed.Finally,for the application of face detection,the SSD network model is optimized,and the hardware and software pipeline structure is adopted to improve the overall performance of the face detection system.The accelerator is implemented on Xilinx ZC706 board.The experimental results show that the accelerator can achieve an average performance of 167.5 GOPS and a face detection rate of 81.2 frames per second,which is 1.58 times that of the embedded GPU platform TX2.