Abstract: The throughput of FPGA accelerator for convolutional neural network(CNN)is determined by parallel strategies and frequency.A throughput-oriented automatic design method is proposed in this paper.Firstly,an automatic design flow is proposed for the parallel strategy and the frequency of the accelerator.Then the design space exploration is formulated as a segment partition problem and is solved by a genetic and greedy algorithm.Finally,the FPGA accelerator design is implemented with the explored parallel strategy.The frequency of the accelerator is considered at the placement and routing stage to meet the design expectation.Two typical CNN models AlexNet and VGG-16 were implemented on the Altera DE5a-Net board by using the proposed method.The experimental results demonstrated that,the throughputs of AlexNet and VGG-16 could be improved by 82.95%and 66.19%respectively,in comparison with the state-of-the-art FPGA accelerators.