Abstract: Optimum design of topological structure for connection box(CB) is an important issue in FPGA.We propose a design method that is applicable to any proportion of switches.Firstly,a novel shifting row by column method is used to initialize the placement of the switches under certain constrains.Then the simulated annealing method is employed to maximize the information entropy of the switch distribution for the CLB input pins.The experimental results show that the proposed method obtains nearly an 8% increase in routability of CB.Moreover,it achieves a 2%～6% reduction in area-delay product.