Abstract: Physical unclonable function(PUF) has an extensive prospect in hardware security applications for its unique and non-cloning characteristics. Motivated by the glitch PUF design architecture which uses the delay characteristics of multiplexer and switch matrix, this paper presents a type of high efficiency glitches PUF circuit design. By changing the input state of multiplexer and the distribution of the switching matrix, the switching latency of the multiplexer can be adjusted to ensure that the ‘glitch’ signal has PUF characteristics. Compared to the large resource consumption of arbiter PUF and ring oscillator PUF, this design increases a single CLB output to two bits and makes Slice resources utilization up to 100%. Experimental results show that the error rate decreases to 2.51% on the condition of maintaining the original high uniqueness(49.61%) when generating 128-bit outputs with Xilinx's Virtex-5 devices. And the compatibility and overhead are significantly improved.