Abstract: In the era of heterogeneous MPSoC, more and more cores are coschedule on a single chip to share DRAM bandwidth and exacerbates the contention problem on DRAM bandwidth. The inter-core interference significantly aggravates the memory access latency, leading to poor system performance and fairness. In this paper, we propose a Throttling based dynamic DRAM bandwidth allocation mechanism（TDBA） to address the problem. TDBA profiles cores’ memory access characteristics at run-time and estimate their interference at DRAM memory to divide them into either compute-intensive cluster or memory-intensive cluster. Meanwhile, TDBA constraints cores in memory-intensive cluster as if to prevent them from dominating DRAM bandwidth usage and starving the cores in compute-intensive cluster. Furthermore, TDBA prioritizes cores in compute-intensive cluster to allow them to quickly resume computation, which further improves system per-formance. We implemente TDBA in a real heterogeneous MPSo C system. Experimental results show that the mechanism significantly improves system performance.